New CODD Pick-up Amplifier

Remote control

The CODD pick-up chassis uses a standard PU control card. Data is sent in the form of frames consisting of one or more 16-bit words. Bits d08..d12 are interpreted as an internal register address. Bits d00..d07 contain the value to be put into that register (or read from it). The full format looks thus:

The table below details the functionality of the defined addresses:

Address	Function	Write	Read
01	Serial Nr + error bit	See below	e0000000ssssssss
02	Test + attenuator ctrl	See below	See below
11	Y gain	min..max = 0..0xff (40dB range)	V = 0.042N-3.06
13	X gain	min..max = 0..0xff (40dB range)	V = 0.042N-3.06
14	Dosimeter drive	min..max = 0..0xff	V = 0.042N-3.06 (Note)
15	S gain	min..max = 0..0xff (40dB range)	V = 0.042N-3.06
16	Dosimeter sense	min..max = 0..0xff	V = 0.0098N (Note)
19	Temperature		T = 0.23N+14.5°C)
1c	+12V		V = 0.060N (Volts)
1d	+5V		V = 0.025N (Volts)
1e	-12V		V = 0.060N-15 (Volts)
1f	Vref (+5V)		V = 0.025N (Volts)

Every frame sent will cause an 18-word status frame to be returned, even if the frame contains no words with valid addresses. Undefined addresses have no other effects. Status information with addresses different from the ones listed in the table have no significance for the functionality of the PU. A word with bit d15 set indicates that the last frame received contained a parity error.

Writing to address 0x01 with the e-bit set will return a frame with an intentional parity error, for testing purposes. You may think of that as writing to address 0x81. The values returned for the three gain registers are the actual gain control voltages, which should lie in the interval -3..+3V. Note that these are slow to change. Allow a few ms of settling time and send a null to get a fresh status frame.

The test and attenuator control register bits are defined as follows:

d15	d14	d13	d12	d11	d10	d09	d08	d07	d06	d05	d04	d03	d02	d01	d00
0	0	0	0	0	0	1	0	Σ40dB	Σ20dB	X40dB	X20dB	Y40dB	Y20dB	T1	T2

For d07 to d02, the direct path is used when the bit is set and the attenuated path when the bit is cleared. (The prototype (Serno 0x17), has the 20dB and 40dB attenuators exchanged.) For d01 and d00, the corresponding test signal is applied when the bit is set.